88-108 MHz Voltage Controlled Oscilator for PLL Controller

This Circuit will explain the PLL unit and the VCO (Voltage Controlled Oscillator) which will create the FM modulated RF signal up to 400mW. the schematic to follow my function description. The main oscillator is based around the transistor Q1. This oscillator is called Colpitts oscillator and it is voltage controlled to achieve FM frequency modulation) and PLL control.

Q1 should be a HF transistor to work well, but in this case I have used a cheap and common BC817 transistor which works great. The oscillator needs a LC tank to oscillate properly. In this case the LC tank consist of L1 with the varicap D1 and the two capacitor (C4, C5) at the base-emitter of the transistor. The value of C1 will set the VCO range.

The large value of C1 the wider will the VCO range be. Since the capacitance of the varicap (D1) is dependent of the voltage over it, the capacitance will change with changed voltage. When the voltage change, so will the oscillating frequency. In this way you achieve a VCO function. You can use many different varicap diod to get it working. In my case I use a varicap (SMV1251) which has a wide range 3-55pF to secure the VCO range (88 to 108MHz).

Inside the dashed blue box you will find the audio modulation unit. This unit also include a second varicap (D2). This varicap is biased with a DC voltage about 3-4 volt DC. This varcap is also included in the LC tank by a capacitor (C2) of 3.3pF. The input audio will passes the capacitor (C15) and be added to the DC voltage. Since the input audio voltage change in amplitude, the total voltage over the varicap (D2) will also change. As an effect of this the capacitance will change and so will the LC tank frequency.

You have a Frequency Modulation of the carrier signal. The modulation depth is set by the input amplitude. The signal should be around 1Vpp. Just connect the audio to negative side of C15. Now you wonder why I don't use the first varicap (D1) to modulate the signal? I could do that if the frequency would be fixed, but in this project the frequency range is 88 to 108MHz.

If you look at the varicap curve to the left of the schematic. You can easily see that the relative capacitance change more at lower voltage than it does at higher voltage. Imagine I use an audio signal with constant amplitude. If I would modulated the (D1) varicap with this amplitude the modulation depth would differ depending on the voltage over the varicap (D1). Remember that the voltage over varicap (D1) is about 0V at 88MHz and +5V at 108MHz. By use two varicap (D1) and (D2) I get the same modulation depth from 88 to 108MHz.

Now, look at the right of the LMX2322 circuit and you find the reference frequency oscillator VCTCXO. This oscillator is based on a very accurate VCTCXO (Voltage Controlled Temperature controlled Crystal Oscillator) at 16.8MHz. Pin 1 is the calibration input. The voltage here should be 2.5 Volt. The performance of the VCTCXO crystal in this construction is so good that you do not need to make any reference tuning.

A small portion of the VCO energy is feed back to the PLL circuit through resistor (R4) and (C16). The PLL will then use the VCO frequency to regulate the tuning voltage. At pin 5 of LMX2322 you will find a PLL filter to form the (Vtune) which is the regulating voltage of the VCO. The PLL try to regulate the (Vtune) so the VCO oscillator frequency is locked to desired frequency. You will also find the TP (test Point) here.

The last part we haven't discussed is the RF power amplifier (Q2). Some energy from the VCO is taped by (C6) to the base of the (Q2). Q2 should be a RF transistor to obtain best RF amplification. To use a BC817 here will work, but not good.

The emitter resistor (R12 and R16) set the current through this transistor and with R12, R16 = 100 ohm and +9V power supply you will easy have 150mW of output power into 50 ohm load. You can lower the resistors (R12, R16) to get high power, but please don't overload this poor transistor, it will be hot and burn up… Current consumption of VCO unit = 60 mA @ 9V.

Printed Circuit Board (PCB.pdf)
This is how the real board should look when you are going to solder the components.
It is a board made for surface mounted components, so the cuppar is on the top layer.

Parts List
100 = R7, R12, R16
330 = R4
1k = R1, R2, R3, R10
3.3k = R11
10k = R5, R6, R14, R17
20k = R13
43k = R9
100k = R8, R15
3.3pF = C2, C16
15pF = C4, C6
22pF = C5
1nF = C1, C3, C8, C17, C22, C23
100nF = C7, C9, C11, C12, C13, C14, C19, C20
2.2uF = C15, C18
220uF = C10, C21
L1 = 3 turns diam 6.5mm (Everything from 6 to 7 mm will work good!)
L2, L3, L4 = 10uH
D1, D2 = SMV1251
Q1 = BC817-25
Q2 = BFG193
X1 = 16.800 MHz VCTCXO Reference oscillator
V1 = 78L05
IC1 = LMX2322

Source

Diode Data Sheet

Diode Data Sheet

– Provides maximum ratings, electrical characteristics, mechanical data, graphs of parameters, etc. for electrical device in use.

– Several parameters are seen in a data sheet for diodes:

Maximum ratings

i) V_RRM: (Peak repetitive reverse voltage).

– Maximum reverse peak voltage that can be applied repetitively across the diode.

ii) V_R: (DC blocking voltage)

– Maximum reverse dc voltage that can be applied across the diode.

iii) V_RSM: (Nonrepetitive peak reverse voltage)

– Maximum reverse peak value of nonrepetitive voltage that can be applied across diode.

iv) I_O: (Average rectified forward current)

– Maximum average value of a 60Hz rectified forward current.

v) I_FSM: (Nonrepetitive peak surge current)

– Maximum peak value of nonrepetitive (one cycle) forward surge current.

– A graph for different temperatures is generally available.

vi) T_A:

– Ambient temperature.

vii) T_J:

– Operating junction temperature range.

viii) T_stg:

– Storage junction temperature range.

Electrical Characteristics

i) v_F: Instantaneous voltage across the forward-biased diode when forward current is 1 A at 25^oC. Shown generally shown by a graph.

ii) V_F(avg): Maximum forward voltage drop averaged over a full cycle.

iii) I_R: Maximum current when diode is reverse-biased.

iv) I_R(avg): Maximum reverse current averaged over one cycle (when reverse-biased with an ac voltage).

Transistor as an Amplifier

The Transistor as an Amplifier

– Amplification is the process of linearly increasing the amplitude of an electrical signal.

– A transistor can act as an amplifier directly using the gain, b.

– Keep in mind that when a transistor is biased in the active (linear) region, the BE junction has a low resistance due to forward bias and the BC junction has a high resistance due to reverse bias.

i) DC and AC quantities

– Amplifier circuits have both ac and dc quantities.

– Capital letters are used will be used for both ac and dc currents.

– Subscript will be capital for dc quantities.

– Subscript will be lowercase for ac quantities.

ii) Transistor amplification

– A transistor amplifies current because the collector current is equal to the base current multiplied by the current gain, b.

– Base current (I_B) is small compared to I_C and I_E.

– Thus, I_C is almost equal to I_E.

– Consider the following circuit.

– An ac voltage, V_in­, is superimposed on the dc bias voltage V_BB.

– DC bias voltage V_CC is connected to the collector through the collector resistance, R_C.

– The ac input voltage produces an ac base current, which results in a much larger ac collector current.

– The ac collector current produces an ac voltage across R_C, thus producing an amplified, but inverted, reproduction of the ac input voltage in the active region.

– The forward biased base-emitter junction present low resistance to the ac wave.

– This internal ac emitter resistance is designated r’_e.

I_e ? I_c = V_b/ r’_e

– The ac collector voltage, V_c = I_cR_C.

– Since I_e ? I_c, the ac collector voltage is V_c ? I_eR_C.

– V_b can be considered the transistor ac input voltage where V_b = V_in – I_bR_B.

– V_c can be considered the transistor ac output voltage.

– The ratio of V_c to V­_b is the ac voltage gain, A_v, of the transistor circuit.

A_v = V_c/V_b

– Substituting I_eR_C for V_c and I_e r’_e for V_b yields

A_v = V_c/V_b ? (I_eR_C)/(I_e r’_e) = R_C/ r’_e

– Thus, amplification depends on the ratio of R_C and r’_e.

– R_C is always considerably larger in value than r’_e, thus the output voltage is larger than the input voltage.

Example:

Determine the voltage gain and the ac output voltage for the following circuit if r’_e = 50 W.

Solution:

The voltage gain is

A_v ? R_C/r’_e = 1 k W /50 W = 20

Thus the output voltage is

V_out = A_vV_b = (20)(100 mV) = 2 V_rms

Voltage Multipliers

Voltage multipliers

– Voltage multipliers use clamping action to increase peak rectified voltages without increasing input transformer’s rating.

– Multiplication factors of 2, 3, and 4 are common.

– They are used in high-voltage, low-current applications.

i) Voltage doubler.

– There are two types of voltage doublers:

a) Half-wave doubler.

– During the positive half-cycle of the secondary voltage, diode D₁ is forward-biased and D₂ is reverse-biased.

– Capacitor C₁ is charged to the peak of the secondary voltage (V_p) less diode drop

– During the negative half-cycle, diode D₂ is forward-biased and D₁ is reverse-biased.

– C₁ cannot discharge.

– Thus, C₁’s voltage adds to the secondary voltage to charge C₂ to approximately 2V_p.

– Under no-load conditions, C₂ remains charged.

– If load is added, C₂ will discharge through load on the next positive half-cycle only to be recharged in the following negative half-cycle.

– Resulting wave is a half-wave, capacitor-filtered voltage.

– PIV across each diode is 2V_P.

b) Full-wave doubler.

– When secondary is positive, D­₁ is forward biased and C₁ charges to approximately V_p.

– During the negative half-cycle, D₂ is forward biased and C₂ charges to approximatetly V_­p.

- Output voltage is taken across the two capacitors in series.

ii) Voltage tripler

- Exactly like the half-wave doubler, but another diode-capacitor pair is added.

Transistor Characteristics

Transistor Characteristics and Parameters

– The ratio of the dc collector current (I_C) to the dc base current (I_B) is the dc beta (b_DC).

– b_DC is called the gain of a transistor:

b_DC = I_C/I_B

– Typical values of b_DC range from less than 20 to 200 or higher.

– b_DC is usually designated as an equivalent hybrid (h) parameter:

h_FE = b_DC

– The ratio of the collector current (I_C) to the dc emitter current (I_E) is the dc alpha (a_DC). This is a less-used parameter than beta.

a_DC = I_C/I_E

– Typical values range from 0.95 to 0.99 or greater.

– a_DC is always less than 1.

– This is because I_C is always slightly less than I_E by the amount of I_B.

– From graph above we can see that there are 6 important parameters to be considered:

i) I_B: dc base current.

ii) I_E: dc emitter current.

iii) I_C: dc collector current.

iv) V_BE: dc voltage at base with respect to emitter.

v) V_CB: dc voltage at collector with respect to base.

vi) V_CE: dc voltage at collector with respect to emitter.

– V_BB forward-biases the BE junction.

– V_CC reverse-biases the BC junction.

– When the BE junction is forward biased, it is like a forward biased diode:

V_BE ? 0.7 V

– But it can be as high as 0.9 V (and is dependent on current). We will use 0.7 V from now on.

– Emitter is at ground. Thus the voltage across R_B is

V_R(B) = V_BB- V_BE

– Also

V_R(B) = I­_RR_B

– Or:

I­_RR_B = V_BB- V_BE

– Solving:

I_B = (V_BB- V_BE)/R_B

– Voltage at collector with respect to grounded emitter is:

V_CE = V_CC – V_R(C)

– Since drop across R_C is V_R(C) = I_CR_C the voltage at the collector is also:

V_CE = V_CC - I_CR_C

– Where I_C = b_DCI_B. Voltage across the reverse-biased collector-bias junction is

V_CB = V_CE - V_BE

Example:

Determine I_B, I_C, I_E, V_BE, V_CE, and V_CB in the following circuit. The transistor has b_DC 150.

Solution:

We know V_BE=0.7 V. Using the already known equations:

I_B = (V_BB- V_BE)/R_B

I_B = (5 – 0.7)/10kW = 430 mA

I_C = b_DCI_B = (150)( 430 mA) = 64.5 mA

I_E = I_C + I_B = 64.5 mA + 430 mA = 64.9 mA

Solving for V_CE and V_CB:

V_CE = V_CC – I_CR_C = 10V-(64.5mA)(100W) = 3.55 V

V_CB = V_CE – V_BE = 3.55 V – 0.7 V­ = 2.85 V

Since the collector is at higher potential than the base, the collector-base junction is reverse-biased.

– Changing the voltage supplies with variable voltage supplies in the circuit above, we can get the characteristic curves of the BJT.

– If we start at some positive V_BB and V_CC = 0 V, the BE junction and the BC junction are forward biased.

– In this case the base current is through the BE junction because of the low impedance path to ground, thus I_C is zero.

– When both junctions are forward-biased, the transistor is in the saturation region of operation.

– As V_CC is increase, V_CE gradually increases, as the I­_C increases (This is the steep slope linear region before the small-slope region).

– I_C increases as V_CC ­increase because V_CE remains less than 0.7 V due to the forward-biased base-collector junction.

– Ideally, when V_CE exceeds 0.7 V, the BC junction becomes reverse biased.

– Then, the transistor goes into the linear region of operation.

– When the BC junction is reverse-biased, I_C levels off and remains essentially constant for a given value of I_B as V_CE continues to increase.

– Actually, there is a slight increase in I_C, due to the widening of the BC collector depletion region, which results in fewer holes for recombination in the base, which causes a slight increase in b_DC.

– For the linear portion, the value of I­_C is calculated by:

I_C = b_DCI­_B

– When V_CE reaches a sufficiently large voltage, the reverse biased BC junction goes into breakdown.

– Thus, the collector current increases rapidly.

– A transistor should never be operated in this region.

– When I_B = 0, the transistor is in the cutoff region, although there is a small collector leakage current.

i) Cutoff

– As said before, when I_B = 0, transistor is in cutoff region.

– There is a small collector leakage current, I_­CEO.

– Normally it is neglected so that V_CE = V_CC.

– In cutoff, both the base-emitter and the base-collector junctions are reverse-biased.

ii) Saturation

– When BE junction becomes forward biased and the base current is increased, I_C also increase (I­_C – b_DCI_B) and V_CE decreases as a result of more drop across the collector resistor (V_CE = V_CC – I_CR_C).

– When V_CE reaches its saturation value, V_CE(sat), the BC junction becomes forward-biased and I_­C can increase no further even with a continued increase in I_B.

– At the point of saturation, I_C = b_DCI_B is no longer valid.

– V_CE(sat) for a transistor occurs somewhere below the knee of the collector curves.

– It is usually only a few tenths of a volt for silicon transistors.

iii) DC load line

– Cutoff and saturation can be illustrated by the use of a load line.

– Bottom of load line is at ideal cutoff (I_C = 0 and V_CE = V_CC).

– Top of load line is at saturation (I_C = I_C(sat) and V_CE = V_CE(sat))

– In between cutoff and saturation along the load line is the active region.

– More to come later.

Example

Determine whether or not the transistor in circuit below is in saturation. Assume V_CE(sat) = 0.2 V.

First determine I_C(sat).

I_C(sat) = (V_CC – V_CE(sat))/R_C

I_C(sat) =(10 V – 0.2V)/10kW = 9.8 mA

Now let’s determine whether I_B is large enough to produce I_C(sat).

I_B = (V_BB - V_BE)/R_B = (3 V – 0.7 V)/10kW = 0.23 mA

I_C = b_DCI_B = (50)(0.23 mA) = 11.5 mA

This shows that with the specified b_DC, this base current is capable of producing an I_C greater than I_C(sat). Thus, the transistor is saturated, and the collector current value of 11.5 mA is never reached. If you further increase I_­B, the collector current remains at its saturation value.

i) More on b_DC

– The b_DC of h_FE is not truly constant.

– It varies with collector current and with temperature.

– Keeping the junction temperature constant and increasing I_C causes b_DC to increase to a maximum.

– Further increase in I_C beyond this point causes b_DC to decrease.

– If I_C is held constant and temperature varies, b_DC changes directly with temperature.

– Transistor data specify b_DC at specific values. Normally the b_DC specified is the maximum value.

ii) Maximum transistor ratings

– Maximum ratings are given for collector-to-base voltage, collector-to-emitter voltage, emitter-to-base voltage, collector current, and power dissipation.

– The product V_CEI_C must not exceed P_D(max).

Example:

The transistor shown in the figure below has the following maximum ratings: P_D(max)=800 mW, V_CE(max) = 15 V, and I_C(max) = 100 mA. Determine the maximum value to which V_CC can be adjusted without exceeding a rating. Which rating would be exceeded first?

Solution:

First, find I_B, so that you can determine I_C.

I_­B = (V_BB – V_BE)/R_B = (5 V – 0.7 V)/22 kW = 195 mA

I_C = b_DCI_B = (100)(195 mA) = 19.5 mA

I_C is much less than I_C(max) and will not change with V_CC. It is determined only by I_B and b_DC.

The voltage drop across R_C is

V­_R(C) =I_CR_C = (19.5 mA)(1 kW) = 19.5 V

Now we can determine the value of V_CC when V_CE = V_CE(max) = 15 V.

V_R(C) = V_CC - V_CE

So,

V_CC(max) = V_CE(max) + V_R(C) = 15 V + 19.5V = 34.5 V

V_CC can be increased to 34.5 V, under the existing conditions, before V_CE(max) is exceeded. However, at this point it is not known whether or not P_D(max) has been exceeded:

P_D = V_CE(max)I_C = (15 V)(19.5 mA) = 293 mW

Since P_D(max) is 800 mW, it is not exceeded when V_CC = 34.5 V. So, V_CE(max) = 15 V is the limiting rating in this case. If the base current is removed, causing the transistor to turn off, V_CE(max) will be exceeded first because the entire supply voltage, V_CC, will be dropped across the transistor.

Op-Amps with negative feedback

– There are several basic ways in which an op-amp can be connected using negative feedback to stabilize the gain and increase frequency response.

– The large open-loop gain of an op-amp creates instability because a small noise voltage on the input can be amplified to a point where the amplifier is driven out of the linear region.

– Open-loop gain varies between devices.

– Closed-loop gain is independent of the open-loop gain.

Closed-Loop voltage gain, A_cl

– It is the voltage gain of an op-amp with external feedback.

– Gain is controlled by external components.

Noninverting Amplifier

– The op-amp circuit shown below is a non-inverting amplifier in a closed-loop configuration.

– Input signal is applied to the non-inverting input.

– The output is applied back to the inverting input through feedback (closed loop) circuit formed by the input resistor R_i and the feedback resistor R_f.

– This creates a negative feedback.

– The two resistors create a voltage divider, which reduces V_out and connects the reduced voltage V_f to the inverting input.

– The feedback voltage is:

V_f = R_i/(R_i + R_f)V_out

– The difference between the input voltage and the feedback voltage is the differential input to the op-amp.

– This differential voltage is amplified by the open loop gain, A_ol, to get V_out­.

V_out­ = A_ol(V_in – V_f)

– Let B = R_i/(R_i + R_f). Thus V_f = BV_out and

V_out = A_ol(V_in – BV_out)

– Manipulate the expression to get:

V_out = A_olV_in - A_olBV_out

V_out + A_olBV_out = A_olV_in

V_out(1 + A_olB) = A_olV_in

Overall Gain = V_out/V_in = A_ol/(1 + A_olB)

– Since A_olB >> 1, the equation above becomes:

V_out/V_in = A_ol/(A_olB) = 1/B

– Thus the closed loop gain of the noninverting (NI) amplifier is the reciprocal of the attenuation (B) of the feedback circuit (voltage-divider).

A_cl(NI) = V_out/V_in = 1/B = (R_i + R_f)/R_i

– Finally:

A_cl(NI) = 1 + R_f/R_i

– Notice that the closed loop gain is independent of the open-loop gain.

Example

Determine the gain of the amplifier circuit shown below. The open loop gain of the op-amp is 150000.

Solution

This is a noninverting amplifier op-amp configuration. Therefore, the closed-loop voltage gain is

A_cl(NI) = 1 + R_f/R_i = 1 + 100 k?/4.7 k? = 22.3

Voltage-Follower (VF)

– Output voltage of a noninverting amplifier is fed back to the inverting input by a straight connection.

– The straight feedback has a gain of 1 (i.e. there is no gain).

– The closed-loop voltage gain is 1/B, but B = 1. Thus, the A_cl(VF) = 1.

– It has very high input impedance and low output impedance.

Inverting Amplifier (I)

– The input signal is applied through a series input resistor R_i to the inverting input.

– The output is fed back through R_f to the same input.

– The noninverting input is grounded.

– For finding the gain, let’s assume there is infinite impedance at the input (i.e. between the inverting and non-inverting inputs).

– Infinite input impedance implies zero current at the inverting input.

– If there is zero current through the input impedance, there is NO voltage drop between the inverting and noninverting inputs.

– Thus, the voltage at the inverting input is zero!

- The zero at the inverting input is referred to as virtual ground.

– Since there is no current at the inverting input, the current through R_i and the current through R_f are equal:

I_in = I_f.

– The voltage across R_i equals V_in because of virtual ground on the other side of the resistor. Therefore we have that

I_in = V_in/R_i.

– Also, the voltage across R_f equals –V_out, because of virtual ground. Therefore:

I_f = -V_out/R_f

– Since I_f = I_in, we get that:

-V_out/R_f = V_in/R_i

– Or, rearranging,

V_out/V_in = -R_f/R_i

– So,

A_cl(I) = -R_f/R_i

– Thus, the closed loop gain is independent of the op-amp’s internal open-loop gain.

– The negative feedback stabilizes the voltage gain.

– The negative sign indicates inversion.

Diode limiting and clamping circuits

a) Limiters:

– Diodes can be used to clip off portions of signal voltages (above or below certain levels).

– Diode will become forward biased as soon as V_A becomes larger than V_BIAS+0.7.

– When diode is forward biased, V_A cannot become larger than V_BIAS + 0.7 V!

– Thus, the voltage across the load, R_L, will also be equal to V_BIAS + 0.7.

– When diode is reverse biased, it appears as an open, so the output voltage is the voltage of R_L alone.

– Desired voltage levels can be attained with a voltage divider.

– We replace the voltage source with a resistive voltage divider.

V_BIAS = R₃/(R₂ + R₃) V_SUPPLY

Example:

b) Diode Clampers

– A clamper adds a dc level to an ac voltage.

– Also called dc restorers.

– When input voltage goes initially negative, diode is forward biased.

– Capacitor charges to near peak of inpt (V_p(in) – 0.7).

– Right after the negative peak, diode is reverse biased (because cathode is held near V_p(in) – 0.7 by charge on capacitor).

– Capacitor can only discharge through the R_L.

– Since R_L has high resistance, the capacitor discharges very little each period.

– Note that time constant should be large (at least 10 times the period of the input voltage).

– Since capacitor retains charge, it acts like a battery in series with the input voltage.

L